International Workshop on Legacy HPC Application Migration

To be held on December 10 Thu. in conjunction with CANDAR'15, Sapporo, Japan, December 8-11, 2015.

In HPC software development, a high priority is given to performance. As system-specific optimizations are almost always required to fully exploit the potential of a system, application programmers usually optimize their application programs for particular systems. Whenever the target system of an application program is changed to a new one, thus, they need to adapt the program to the new system. This is so-called legacy HPC application migration. The migration cost increases with the hardware complexity of target systems. Since future HPC systems are expected to be extremely massive and heterogeneous, migration will require more efforts and will be essential for performance in the upcoming extreme-scale computing era. Therefore, this International Workshop on Legacy HPC Application Migration (LHAM) offers an opportunity to share practices and experience of legacy HPC application migration, and also discuss coming and developing technologies and research directions to reduce the migration cost.

This workshop is held on December 10 Thu. as one of colocated workshops of CANDAR'15: http://is-candar.org/

Previous LHAM workshops:

• http://xev.arch.is.tohoku.ac.jp/LHAM2014/
• http://xev.arch.is.tohoku.ac.jp/LHAM2013/

December 10 Thu., 10:45-12:00, Room B (Chair: Reiji Suda, The University of Tokyo)

1. A Case Study of User-Defined Code Transformations for Data Layout Optimizations, Takeshi Yamada, Shoichi Hirasawa, Hiroyuki Takizawa and Hiroaki Kobayashi
2. Migration of an Atmospheric Simulation Code to an OpenACC Platform Using the Xevolver Framework, Kazuhiko Komatsu, Ryusuke Egawa, Shoichi Hirasawa, Hiroyuki Takizawa, Ken'Ichi Itakura and Hiroaki Kobayashi
3. A Non-intrusive Technique for Interfacing Legacy Fortran Codes with Modern C++ Runtime Systems, Zachary D. Byerly, Hartmut Kaiser, Steven Brus and Andreas Schäfer

December 10 Thu., 13:15-14:15, Room B (Chair: Hiroyuki Takizawa, Tohoku University)

Abstract: As the cost of moving data on current and future architectures becomes increasingly dominant, the challenges of developing high-performance applications are increasingly onerous. The goal of compiler optimization in high-performance computing is to take as input a computation that is architecture independent and maintainable and produce as output efficient implementations of the computation tuned for the target architecture. Autotuning empirically evaluates a search space of possible implementations of a computation to identify the implementation that best meets its optimization criteria (e.g., performance, power, or both). Combining the two concepts, autotuning compilers generate this search space of highly-tuned implementations either automatically or with programmer guidance. This talk will explore the role of compiler technology in achieving very high levels of performance, comparable to what is obtained manually by experts. As a case study, it will highlight some of the aggressive optimizations required to reduce communication for a specific high-performance application domain that is notoriously memory bound: geometric multigrid and the stencil computations within them.

December 10 Thu., 14:30-15:45, Room B (Chair: Kazuhiko Komatsu, Tohoku University)

1. A Case Study of Memory Optimization for Migration of a Plasmonics Simulation Application to SX-ACE, Raghunandan Mathur, Hiroshi Matsuoka, Osamu Watanabe, Akihiro Musa, Ryusuke Egawa and Hiroaki Kobayashi
2. Xevtgen: fortran code transformer generator for high performance scientific codes, Reiji Suda, Hiroyuki Takizawa and Shoichi Hirasawa
3. A Verification Framework for Streamlining Empirical Auto-tuning, Shoichi Hirasawa, Hiroyuki Takizawa and Hiroaki Kobayashi

• Programming models, languages and frameworks for supporting HPC application migration.
• Algorithms and implementation schemes for future-generation computing systems.
• Runtime systems for hiding the complexity of underlying system architectures.
• Practices and experience of HPC application migration.

• Regular paper: 5-7 pages
• Poster paper: 3-4 pages

Please see Workshop Paper Submission Instruction.

The conference and workshop proceedings will be published by Conference Publishing Service and submitted to IEEE Xplore and CSDL digital libraries. Also they are submitted for indexing through INSPEC, EI (Compendex), Thomson ISI, and other indexing services.

We plan to publish extended versions of selected papers from CANDAR main conference and workshops. Please see Special Issue for the details.

• Workshop submission site open: June 1, 2015
• Workshop abstract submission due: August 15, 2015 August 30, 2015 September 4, 2015 (closed)
• Workshop paper submission due: August 20, 2015 September 4, 2015September 9, 2015 (closed)
• Workshop author notification: September 25, 2015October 1, 2015
• Workshop date: December 10 Thu., 2015

See more details at: http://is-candar.org/schedule/

• Hiroyuki Takizawa (OC chair), Tohoku University, Japan.
• Reiji Suda (PC chair), The University of Tokyo, Japan.
• Daisuke Takahashi (Local arrangement chair), University of Tsukuba, Japan.
• Ryusuke Egawa (Financial chair), Tohoku University, Japan.
• Kazuhiko Komatsu (Publicity chair), Tohoku University, Japan.
• Shoichi Hirasawa (Web management chair), Tohoku University, Japan.

• Wen-mei Hwu, The University of Illinois at Urbana-Champaign, USA.
• Chisachi Kato, The University of Tokyo, Japan.
• Michael Resch, The High Performance Computing Center Stuttgart, Germany.

• Reiji Suda (PC chair), The University of Tokyo, Japan.
• Shirley V. Moore (PC vice chair), The University of Texas at El Paso, USA.
• Ritu Arora, The Texas Advanced Computing Center, USA.
• Anthony Danalis, The University of Tennessee, Knoxville, USA.
• Toshio Endo, Tokyo Institute of Technology, Japan.
• Edgar Gabriel, University of Houston, USA.
• Masatomo Hashimoto, RIKEN AICS, Japan.
• Shoichi Hirasawa, Tohoku University, Japan.
• Fumihiko Ino, Osaka University, Japan.
• Kazuhiko Komatsu, Tohoku University, Japan.
• Kiyoshi Kumahata, RIKEN AICS, Japan.
• Masahiro Nakao, RIKEN AICS, Japan.
• Kamil Rocki, IBM, USA.
• Hiroyuki Takizawa, Tohoku University, Japan.
• Jeffrey S. Vetter, Oak Ridge National Laboratory, USA.

E-mail: lham2015 .at. xev.arch.is.tohoku.ac.jp (replace “.at.” by “@” in the email address)