- Speaker: Takekazu Tabata (Fujitsu Ltd.)
- Speaker: Yuji Shinano(ZIB)
- Title: Building optimal solutions to prize-collecting Steiner tree problems on supercomputers
- Abstract：SCIP-Jack is a customized, branch-and-cut based solver for Steiner tree and related problems. ug[SCIP-Jack, MPI] extends SCIP-Jack to a massively parallel solver by using the Ubiquity Generator (UG) framework. ug[SCIP-Jack, MPI] was the only solver that could run on a distributed environment at the (latest) 11th DIMACS Challenge in 2014. Furthermore, it could solve three well-known open instances and updated 14 best known solutions to well-known instances from the benchmark libary SteinLib. After the DIMACS Challenge, SCIP-Jack has been considerably improved. However, the improvements were not reflected on ug[SCIP-Jack, MPI]. An updated version of ug[SCIP-Jack, MPI] enabled us to use branching on constrains and a customized racing ramp-up, among others. The new features brought us the capability to use up to 43,000 cores to solve two more open instances from the SteinLib. SCIP-Jack solves not only the classic Steiner tree problem, but also a number of related problems. In this presentation, we show for the first time results of using ug[SCIP-Jack, MPI] on a problem class other than the classic Steiner tree problem, namely for prize-collecting Steiner trees. The prize-collecting Steiner tree problem is a well-known generalization of the Steiner tree problem and entails many real-world applications.
- Speaker: Yasunori Owada (National Institute of Information and Communications Technology)
- Speaker: Takahiro Katagiri (Nagoya University)
- Title: Towards Auto-tuning Technology in Exascale Era
- Abstract: We face a difficulty to establish high performance of software on computer architectures in exascale era. Many possibilities of computer architectures are predicted toward to exascale era, such as accelerators based on Graphics Processing Unit (GPU), Field-Programmable Gate Array (FPGA), and quantum computers. For CPU point of view, data-flow computing is candidate in addition to many core CPUs. In memory level, high bandwidth has been established by using 3D stacking memory. However, deep heterogeneity of memory is still critical problem on performance in the memory level. To solve above issues of software performance toward to exascale era, it is said that auto-tuning (AT) is one of promising technologies. The speaker has been studying AT technology in this decade. In particular, the speaker has been developing an AT language, named ppOpenAT, to establish easy development of AT software from legacy codes to advanced computer architectures. In this talk, the speaker will talk about novel AT functions for ppOpen-AT toward to exascale era. This work was supported by JSPS KAKENHI, Grant-in-Aid for Scientific Research (S), entitled “Innovative Method for Computational Science by Integrations of (Simulation + Data + Learning) in the Exascale Era.”
- Speaker: Max Plauth (Hasso Plattner Institute, University of Potsdam)
- Title: Bridging the Gap: Towards Energy-efficient Execution of Workloads on Heterogeneous Hardware
- Abstract: With electricity grids increasingly transforming into smart grids, a number of challenges are introduced for today's large-scale computing systems. To operate reliably and efficiently, computing systems must adhere not only to technical limits such as thermal constraints, but they must also reduce operating costs, for example, by increasing their energy efficiency. Efforts to improve the energy efficiency, however, are often hampered by inflexible software components that hardly adapt to underlying hardware characteristics. This talk discusses approaches to bridge the gap between inflexible software and heterogeneous hardware. Using adaptive software components that dynamically adapt to heterogeneous processing resources such as different hardware architectures and accelerator classes during runtime, energy efficiency of computing systems may be improved.
- Speaker: Shlomi Dolev (Ben-Gurion University of the Negev)
- Abstract: The multi-core technology is a limited answer to the difficulty in continuing Moore's law using a single core. The change is dramatic, and there is a need to redesign systems to utilize parallel and distributed capabilities from the level of the microprocessor, instead of merely speeding up the frequency and using the same algorithms as has been done for decades. As a side note, recall, that some tasks are sequential in nature, and so cannot be sped up via the use of several cores. New computing technologies implies new opportunities for using parallel and distributed algorithms. The talk will overview several technologies that can and are influencing the computing capabilities. Examples for algorithms designed for optical computing devices, for quantum computing and for cloud and swarm computing will be described.
- Speaker: Sumio Morioka (Interstellar Technologies Inc.)
- Title Information Theoretically Secure Communication for Spacecrafts in the NewSpace Sector
- Abstract: Rapid increase in the number of spacecrafts made by private commercial companies is one of the main trends in recent space development activities. The movement is called as NewSpace, in contrast with traditional space development driven by national governments. It is expected that thousands of small satellites will be launched by small launch vehicles (space rockets) in the next 10 years, in order to construct worldwide communication and remote sensing networks, where small satellites communicate not only with ground stations but also with each other. In this trend, low cost yet highly secure wireless communication is desired for making the space networks safe and reliable. In this talk, we will introduce that information theoretic security can be achieved in critical spacecraft communication systems, while most of the communication systems on the ground or in the air are based on computational security. We have designed an information theoretically secure communication protocol for small spacecrafts, and have been conducting flight tests on a space launch vehicle MOMO developed by Interstellar Technologies Inc. in Japan.